Support Question of the Week: Using a Level Shifter Board for Fast SPI Signals

Q: I am working on an embedded machine that supports fast SPI signals at 1.8V logic levels, and I'm trying to communicate with a device that supports SPI at 3V logic levels. The SPI (serial peripheral connection interface) communication will be at 8MHz.

I have the TP240610 Level Shifter Board - can you advise me how to set up this board for the voltage levels at the speed I need for this project?

A: Thanks for your question!  The Level Shifter board supports SPI at 8MHz,  the target side with the 1.8V logic level and adapter side with the 3V logic level.  Here is more information from section 4.3 of the Level Shifter board data sheet that should apply to your project.

The SPI level shifting logic must be explicitly controlled for the direction of traffic, which is determined by the four headers on the right side of the board (see Figure 1). Selections are made by placing a jumper on one of the headers.

Level Shifter Board Supports Fast SPI Signals and SPI Functions: Master, Slave, and Monitor Figure 1: Level Shifter Board

The selections are described below:

MASTER: When selected, the Adapter/Analyzer side of the board behaves as the SPI master.

  • The SS# (slave select), SCK, and MOSI (master output slave input) lines are shifted down to the Target side logic level.
  • The MISO (master input slave output) line is left in its default enabled state, and is shifted up to the Adapter/Analyzer’s logic level.

SLAVE: When selected, the Adapter/Analyzer side of the board behaves as the SPI slave.

  • The MISO line is shifted down to the Target side logic level.
  • The SS#, SCK, and MOSI line is left in their default enabled state, and is shifted up to the Adapter/Analyzer’s logic level.

MONITOR: When selected, SPI lines are left in their default enabled state.

  • The SPI lines are shifted up to the Adapter/Analyzer side logic level.
  • This option is only used when a Beagle I2C/SPI/MDIO analyzer is plugged into the board and no SPI host adapter is being used.

DISABLE:  When selected, all Target side SPI outputs are disabled, and set to a high-impedance state.

  • If no connection is set, the board defaults to this state.
  • However, if any of the previous configurations is set,  that configuration have precedence over "Disable".

Note: In almost all cases, only one of the connections should be set at a time. Using more than one may cause incorrect SPI operations. The only exception for using more one jumper is when the SPI lines are used for GPIO (general purpose input/output).

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We hope this answers your question. If you have other questions about our host adapters, software tools or other Total Phase products, feel free to email us at sales@totalphase.com or support@totalphase.com.

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