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What is the Maximum Speed We Can Achieve Between the Cheetah SPI Host Adapter and the Target SPI Device?
Rena

Question from the Customer:

We plan to use the Cheetah SPI Host Adapter in an automated testing application. Here are the setup details:

  • The distance between the Cheetah and the target SPI slaves is approximately 6 feet.
  • We will be using isolators and LVDS to TTL (and the reverse) line drivers.
  • The estimated delay from the MOSI to the MISO, relative to the same clock rate, will be approximately 60 ns.

Can you help us determine the maximum speed that we could achieve in this application?

Response from Technical Support:

Thanks for your question!  There is a formula that you can use for rough estimates.  Please note that the actual SPI speed can vary due to many factors, including the delays caused by the materials used and the environment of the setup.

The formula that you can use to estimate the maximum SPI bitrate:

F max = 1/ (2 x target cable round trip delay + 2 x Cheetah cable round trip delay + target device clock to output)

Applying values based on your setup:

F max = 1/ (2 x 60 ns + 2 x 0.6 ns + 2)

The calculated value:

F max = 1/123.2 ns = 8.12 M Hz

 

To preserve the signal integrity condition for high frequency applications, we recommend using as short a cable as possible, no more than 3-5 feet between the Cheetah and the target device.  However, as your setup uses LVDS (low-voltage differential signaling) between the Cheetah adapter and the target SPI device, a longer cable should be possible, as long as the total round trip delay is small.

For example, if your system has a 60 ns round trip delay, and 2 ns target device clock to output, then the theoretical maximum frequency is 8.12 MHz. However, as previously stated, the actual frequency can be lower due to other system delays, such as delays caused by the target board and the target connector.

The figures below show a sample block diagram and a timing diagram that is based on the system that you described.

154139_diagram

Figure 1: Diagram of the Signal Routing

 

Block Diagram of setup with long cables.

Figure 2: Estimated Delays Used in the Calculation

Additional resources that you may find helpful include the following:

We hope this answers your question. If you have other questions about our serial platforms, board accessories or other Total Phase products, feel free to email us at sales@totalphase.com, or if you already own one of our devices and have a technical question, please submit a request for technical support.