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The Beagle I2C/SPI Protocol Analyzer is capable of non-intrusively monitoring I2C at up to 4 MHz.
Please note that captured I2C data is 9 bits wide because the ninth bit is the ACK/NACK bit to indicate whether the data was received properly. For this reason, I2C data will appear differently in the General views.
Here are the steps for starting an I2C capture.
Start the Data Center application.
Connect the Beagle I2C/SPI analyzer to the analysis computer. Make sure that the green indicator LED has illuminated.
Connect the Beagle I2C/SPI analyzer to the I2C bus. The 10-pin ribbon cable can be connected directly, or the 10-pin split cable can be used to provide individual flying leads.
Click the Connect to Analyzer… button in the toolbar and connect to a Beagle
I2C/SPI analyzer.
Make sure I2C is selected in the Protocol Lens pull-down menu under the Transaction window.
Click Device Settings in the toolbar and set the I2C capture settings. Make sure I2C is selected in the Capture Protocol pull-down menu.
Connect the Beagle I2C/SPI analyzer to the target device.
Click the Run Capture button to start the data capture. Once the capture has started, the capture indicator will turn green and an informational transaction will appear in the Transaction window which notes when the capture was started.
To stop the capture, click on the Stop Capture button.
The I2C device settings described below can be configured in the Device Settings dialog (Figure 98). To open this dialog, click on the Device Settings… button.
The Device Settings dialog can also be accessed through Analyzer | Device Settings….
There are three different sampling rates which can be used to monitor the I2C bus. As a rule of thumb, it is recommended that the sampling rate should be at least 4 times faster than the data rate of the monitored bus. For a 400 kHz I2C bus, a sampling rate of 10 MHz would suffice.
To select a sampling rate, simply select the desired rate from the pull-down menu.
It is possible to power a downstream target, such as an I2C or SPI EEPROM with the Beagle analyzer’s power (which is provided by the USB port). It is ideal if the downstream device does not consume more than 20-30 mA.
To enable or disable target power, check or uncheck the box in the Settings window.
There is a 2.2K resistor on each I2C line (SCL, SDA). The lines are effectively pulled up to 3.3V, so that results in approximately 1.5 mA of pull-up current. For more information about the pull-up resistors, please consult the Beagle I2C/SPI Protocol Analyzer datasheet.
To enable or disable the I2C pull-ups, check or uncheck the box in the Settings window.
The I2C Transaction window (Figure 99) displays all the transactions that were captured on the I2C bus in real time. When a transaction is selected in the Transaction window, detailed information about that transaction is displayed in the Info pane.
For a general description of the Transaction window, see Section 5.1. The general description encompasses the behavior of the I2C Transaction window, with the following modifications:
Error codes (Err)
Error codes listing abnormal conditions that occurred while capturing the transaction. See Table 2 for the possible error codes. In addition, there are several error codes specific to I2C higher-level decoding as described in Table 8.
Code |
Meaning |
Description |
O |
Stop is required |
Stop condition is required for this transaction but was not observed. |
N |
No protocol match |
Transaction did not match any of the expected protocols. |
C |
PEC problem |
Transaction structure matched only to a protocol containing PEC, but PEC value is incorrect. |
K |
Class error |
Transaction structure did not match to the protocol dictated by the command byte and the device class. |
Start/Stop (S/P)
This column is unique to the I2C Transaction window. It indicates whether the start and stop conditions were observed for each record. S indicates the start condition; P indicates the stop condition. Transactions that have no stop condition (in the case of repeated start conditions) will have only S displayed.
Address (Addr)
The I2C address of the slave device that was the target of the transaction. This number is in hexadecimal. “None” is displayed for transactions that are zero bytes long, and thus have no address field. An asterisk (*) following the address indicates that the address byte was NACK’ed. In certain situations, an I2C transaction may not specify the lowest 8 bits of a 10-bit slave address. In these situations, the Address (Addr) column will render the incomplete addresses as 0XX, 1XX, 2XX, or 3XX, depending on the value of the first two address bits.
Data
In the I2C Data column, NACK’ed bytes are followed by an asterisk (*) to differentiate them from ACK’ed bytes.
Three unique capture views are available in Data Center when using a Beagle I2C/SPI Protocol Analyzer. To select a Capture View, use the Capture View Menu in the Transaction Window Controls section of the application (Section 4.3).
Packet – I2C Protocol-level decoding is performed, records are in time-order, and no grouping is performed.
Transaction – Protocol-level decoding is performed and packets are grouped into transactions depending higher-level decoding options selected. For more information regarding transaction-level parsing, see Section 7.5.
Class – Class-level parsing is performed. Transactions are decoded further depending on the selected class options. For more information regarding class-level parsing, see Section 7.5.
The following are the steps to enable Transaction- or Class-level parsing when using the Beagle I2C/SPI Protocol Analyzer:
Configure higher-level decoding options in the I2C Configuration Manager dialog (see Section 7.6).
Select the Transaction or the Class View in the Capture View menu of the Transaction Window (Section 7.4)
Records are grouped into transactions as dictated by the selected higher-level protocol, and higher-level fields are visible for each transfer. Currently, the only supported higher-level protocol is SMBus BETA . Please send us the feedback about how we can improve the SMBus decoding.
Post-capture, It is possible to apply a configuration to a device in order to see its data parsed at the class or transaction level. More information about applying and managing configurations can be found in Section 7.6.
SMBus decoding can be enabled for the whole bus or for individual devices by selecting SMBus BETA decoding option in the I2C Configuration Manager dialog. For information about SMBus, refer to System Management Bus (SMBus) Specification.
SMBus Transaction records
The I2C packets will be grouped based on the presence of Stop condition and packet types, and classified into one of the SMBus transaction types described in the Table 9. Each transaction will be checked against all SMBus protocols (with and/or without PEC, depending on the selected option and as relevant to the specific protocol). A transaction will be highlighted as ’No protocol match’ error if one of the following occurs:
A matching SMBus protocol was not found
A matching SMBus protocol with PEC was found but PEC is incorrect.
Transaction Type |
Corresponding SMBus protocols |
Quick Command |
Quick Command |
Write/Send Txn |
Send Byte, Write Byte/Word, Block Write, SMBus Host Notify |
Read/Receive Txn |
Receive Byte, Read Byte/Word, Block Read |
Process Call Txn |
Process Call, Block Write - Block Read Process Call |
Address Resolution Protocol (ARP) commands will be decoded further as described in the System Management Bus (SMBus) Specification.
Additional information can be obtained by clicking on the transaction-level record and looking at the Info pane. The Info pane will show the parsed fields for each matched SMBus protocol. It will also display error information for a few other possible SMBus protocols. See Figure 100 for an example.
SMBus Class records
Class-level records will display information relevant to the device class. See Figure 101 for an example. Class-level information will be available for devices under one of the following conditions:
Class-level decoding option is selected in the I2C Device Configuration Manager Dialog for the device.
Use default SMBus device address assignment option is selected in the I2C Bus Configuration Manager Dialog and the device has one of the purpose-assigned slave addresses.
Device has one of the fixed addresses: SMBus Host or SMBus Device Default Address.
The I2C Configuration Manager Dialog can be accessed from the Bus Pane’s right-click context menu.
The I2C Bus Configuration Manager Dialog (Figure 102) gives the user the opportunity to specify higher-level decoding for all devices on the I2C bus. The following options are available in the dialog:
Decoding
None – Higher-level decoding will not be applied.
SMBus BETA – SMBus decoding will be applied as described in Section 7.5.
SMBus Settings
PEC Usage
Never – None of the transactions contain PEC. This option will be ignored for transactions to SMBus Device Default Address, where PEC is required. If this option is applicable, selecting it will allow for more accurate SMBus protocol-level error reporting.
On every transaction that supports PEC – All transactions contain PEC. This option will be ignored for SMBus host notify protocol, where PEC is not used. If this option is applicable, selecting it will allow for more accurate SMBus protocol-level error reporting.
Unknown – Transactions are matched against both with PEC and without PEC versions of SMBus protocols.
Use default SMBus device address assignment
If checked, the Data Center software will apply appropriate class-level decoding to the devices with purpose-assigned slave addresses as described in Appendix C of System Management Bus (SMBus) Specification. This option applies only to devices that do not explicitly override bus decoding options. The exception is fixed addresses. If configured as SMBus device, device with slave address 0x08 will be treated as SMBus Host, and device with slave address 0x61 will be treated as SMBus Device Default Address regardless of this option.
The I2C Device Configuration Options Dialog (Figure 103) gives the user the opportunity to select higher-level decoding options for individual devices on the I2C bus. The following options are available in the dialog:
Override bus decoding options
Gives the user the opportunity to either use default bus configuration options or specify options for individual devices.
Decoding
See Section 7.6 for description.
SMBus Settings
PEC Usage
See Section 7.6 for description.
SMBus Host
If checked, indicates that this is the SMBus Host device. This option cannot be changed.
SMBus Device Default Address
If checked, indicates that this is the SMBus Device Default Address. This option cannot be changed.
Class-level decoding
If checked, transactions will be decoded using the selected class-level interface. Currently, only Smart Battery System interfaces are supported. For information about these interfaces, refer to the Smart Battery System Specifications.
The Details window has some extra features to accommodate the I2C protocol. Refer to section 5.2 for an overview of the Details View, including the Data and Timing panes.
The I2C Data pane (Figure 104) provides a hexadecimal and ASCII dump of the contents of the transaction. Please note that it does not include the byte(s) which are composed of the slave address and read/write bit. In the I2C Data pane, NACK’ed bytes are rendered in red text to differentiate them from ACK’ed bytes.
In the I2C Timing pane (Figure 105), all the bytes from the transaction will be displayed in the pane, including start and stop conditions.
There are a few additional things to note:
I2C data is sent MSB first and LSB last. In the column header for the Timing column, the bit order is indicated to be b7 …b0.
The timing display for I2C actually shows 9 bits. The last bit is the ACK/NACK bit.
The following is a description of the parameters that are specific to the I2C protocol. For a description of the General parameters, or for information on how to operate the Filter pane, refer to Section 5.5. The I2C Filter pane (Figure 106) has protocol-specific filtering options under the Bus caption in the pane.
Filter the transactions based on the I2C slave address of the message. The addresses should be specified in hexadecimal format. Multiple device addresses should be separated by commas or spaces. Note that this parameter only filters transactions that were addressed to slaves with 7-bit addresses.
Filter the transactions based on the I2C slave address of the message. The addresses should be specified in hexadecimal format. Multiple device addresses should be separated by commas or spaces. Note that this parameter only filters transactions that were addressed to slaves with 10-bit addresses.
Partial 10-bit addresses can be specified as well using the 0XX, 1XX, 2XX, or 3XX notation as seen in the Transaction window.
Unchecking this option will hide all transactions in which no data was NACK’ed
Unchecking this option will hide all transactions in which any data was NACK’ed.
Unchecking this option will hide all transactions in which the address was ACK’ed.
Unchecking this option will hide all transactions in which the address was NACK’ed.
Unchecking this option will hide all Read transactions.
Unchecking this option will hide all Write transactions.
Unchecking this option will hide all transactions that have an unknown address. An unknown address can occur when a transaction did not contain any data or encountered an error while transmitting the address.
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